Active-HDL is a completely integrated FPGA design and verification solution, providing ease-of-use, advanced verification and debugging capabilities for today’s most complex FPGA designs. A multi-vendor flow manager controls simulation, synthesis and implementation for all devices from Actel®, Altera®. Lattice®, Quicklogic®, Xilinx® and other FPGA vendors.
Top Features:
* Graphical design entry including FPGA vendor primitives
* Mixed language HDL simulation
* Pre-compiled FPGA vendor libraries
* Automatic Testbench generation
* Import legacy designs
* Code2Graphics and Graphics2Code
* DSP design and co-simulation with MATLAB®/Simulink®
* HTML and PDF design documentation
* Code coverage analysis and Linting
* Open IP Encryption
Tags: Active-HDL 8.1 rapidshare, Active-HDL 8.1 megaupload, Active-HDL 8.1 hotfile, free dowload Active-HDL 8.1.
For a link to the post:
HTML CODE:
BB CODE:
Only works for VHDL. Is it possible to use this software that can be used both for VHDL and Verilog HDL? Thanks.
Add A Comment
You must be logged in to post a comment.